{"id":8280,"date":"2019-09-24T13:47:04","date_gmt":"2019-09-24T13:47:04","guid":{"rendered":"http:\/\/10.1.5.53\/?page_id=8280"},"modified":"2019-12-29T09:05:19","modified_gmt":"2019-12-29T09:05:19","slug":"%d9%81%d8%b1%d9%8a%d9%82-%d8%a7%d9%84%d8%ad%d8%b3%d8%a7%d8%a8-%d8%a7%d9%84%d8%ab%d9%86%d8%a7%d8%a6%d9%8a-%d9%84%d9%84%d8%aa%d8%b7%d8%a8%d9%8a%d9%82%d8%a7%d8%aa-%d8%a7%d9%84%d8%b1%d9%82%d9%85","status":"publish","type":"page","link":"https:\/\/www.cdta.dz\/ar\/%d8%a7%d9%84%d8%a8%d8%ad%d8%ab-%d9%88%d8%a7%d9%84%d8%aa%d9%83%d9%86%d9%88%d9%84%d9%88%d8%ac%d9%8a%d8%a7\/%d8%a7%d9%84%d8%a3%d9%82%d8%b3%d8%a7%d9%85\/%d9%87%d9%86%d8%af%d8%b3%d8%a9-%d8%a7%d9%84%d8%a7%d9%86%d8%b8%d9%85%d8%a9-%d9%88-%d8%a7%d9%84%d9%88%d8%b3%d8%a7%d8%a6%d8%b7-%d8%a7%d9%84%d9%85%d8%aa%d8%b9%d8%af%d8%af%d8%a9\/%d9%81%d8%b1%d9%8a%d9%82-%d8%a7%d9%84%d8%ad%d8%b3%d8%a7%d8%a8-%d8%a7%d9%84%d8%ab%d9%86%d8%a7%d8%a6%d9%8a-%d9%84%d9%84%d8%aa%d8%b7%d8%a8%d9%8a%d9%82%d8%a7%d8%aa-%d8%a7%d9%84%d8%b1%d9%82%d9%85\/","title":{"rendered":"\u0641\u0631\u064a\u0642:\u00a0\u0627\u0644\u062d\u0633\u0627\u0628 \u0627\u0644\u062b\u0646\u0627\u0626\u064a \u0644\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a \u0627\u0644\u0631\u0642\u0645\u064a\u0629\u00a0"},"content":{"rendered":"

[vc_row][vc_column][vc_column_text]<\/p>\n

\u0641\u0631\u064a\u0642: \u0627\u0644\u062d\u0633\u0627\u0628 \u0627\u0644\u062b\u0646\u0627\u0626\u064a \u0644\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a \u0627\u0644\u0631\u0642\u0645\u064a\u0629<\/strong><\/span><\/h2>\n

\u0642\u0627\u0626\u062f \u0627\u0644\u0641\u0631\u064a\u0642: \u0623\u0648\u062c\u064a\u062f\u0629 \u0639\u0628\u062f \u0627\u0644\u0643\u0631\u064a\u0645 \u0643\u0645\u0627\u0644<\/span><\/p>\n

\u0639\u0631\u0636 \u0627\u0644\u0641\u0631\u064a\u0642<\/strong><\/span><\/h3>\n

\u0641\u0631\u064a\u0642 BANA \u0646\u0634\u0637 \u0641\u064a \u0645\u062c\u0627\u0644 \u062a\u0637\u0648\u064a\u0631 IP-VLSI \u0627\u0644\u0645\u064f\u062d\u0633\u0651\u0646 \u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a \u0645\u0639\u0627\u0644\u062c\u0629 \u0627\u0644\u0625\u0634\u0627\u0631\u0627\u062a \/ \u0627\u0644\u0635\u0648\u0631 \u0648\u0623\u0646\u0638\u0645\u0629 \u0627\u0644\u062a\u062d\u0643\u0645 \u0648\u0623\u0646\u0638\u0645\u0629 \u0627\u0644\u062a\u0634\u0641\u064a\u0631 \u0648\u0645\u0627 \u0625\u0644\u0649 \u0630\u0644\u0643.<\/span><\/p>\n

\u0645\u0648\u0636\u0648\u0639 \u0627\u0644\u0628\u062d\u062b<\/strong><\/span><\/h3>\n
    \n
  • \u062a\u0637\u0648\u064a\u0631 \u062e\u0648\u0627\u0631\u0632\u0645\u064a\u0627\u062a \u0648\u0625\u0639\u0627\u062f\u0629 \u062a\u0631\u0645\u064a\u0632 \u062c\u062f\u064a\u062f\u0629 \u062a\u0633\u062a\u0646\u062f \u0625\u0644\u0649 \u062d\u0633\u0627\u0628 \u062f\u0642\u064a\u0642 \u0648\u063a\u064a\u0631 \u062f\u0642\u064a\u0642 \u0644\u062a\u062d\u0633\u064a\u0646 VLSI \u0644\u0644\u0623\u0646\u0638\u0645\u0629 \u0627\u0644\u062e\u0637\u064a\u0629 \u0627\u0644\u062a\u064a \u062a\u062e\u062a\u0644\u0641 \u0648\u062a\u062a\u063a\u064a\u0631 \u0628\u0645\u0631\u0648\u0631 \u0627\u0644\u0648\u0642\u062a.<\/span><\/li>\n
  • \u062a\u0637\u0648\u064a\u0631 \u062e\u0648\u0627\u0631\u0632\u0645\u064a\u0627\u062a \u062c\u062f\u064a\u062f\u0629 \u062a\u0633\u062a\u0646\u062f \u0625\u0644\u0649 \u0627\u0644\u062a\u0643\u0631\u0627\u0631 \u0627\u0644\u0641\u0648\u0636\u0648\u064a \u0648\u0627\u0644\u0645\u0646\u062d\u0646\u064a\u0627\u062a \u0627\u0644\u0625\u0647\u0644\u064a\u0644\u062c\u064a\u0629 \u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a \u0627\u0644\u062a\u0634\u0641\u064a\u0631 \u0627\u0644\u062e\u0641\u064a\u0641\u0629 (\u0627\u0644\u062a\u0634\u0641\u064a\u0631 \u0627\u0644\u062e\u0641\u064a)<\/span><\/li>\n<\/ul>\n

    \u0627\u0644\u062e\u0628\u0631\u0629<\/strong><\/span><\/h3>\n
      \n
    • \u062d\u0633\u0627\u0628 \u0627\u0644\u0643\u0645\u0628\u064a\u0648\u062a\u0631 \u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a VLSI.<\/span><\/li>\n
    • \u062a\u0635\u0645\u064a\u0645 \u0631\u0642\u0645\u064a \u0633\u0631\u064a\u0639 \u0648\u0627\u0646\u062e\u0641\u0627\u0636 \u0627\u0633\u062a\u0647\u0644\u0627\u0643 \u0627\u0644\u0637\u0627\u0642\u0629.<\/span><\/li>\n
    • \u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0639\u0646\u0627\u0648\u064a\u0646 IP \u0648\u0627\u0644\u062a\u0635\u0645\u064a\u0645 \u0648\u0627\u0644\u062a\u062d\u0642\u0642.<\/span><\/li>\n
    • FPGA \u060c ASIC \u060c \u0634\u0631\u0643\u0629 \u0646\u0641\u0637 \u0627\u0644\u062c\u0646\u0648\u0628 \u060c \u0648\u0627\u0644\u0623\u0646\u0638\u0645\u0629 \u0627\u0644\u0645\u062f\u0645\u062c\u0629.<\/span><\/li>\n<\/ul>\n

      \u0645\u0634\u0627\u0631\u064a\u0639 \u0627\u0644\u0628\u062d\u062b<\/strong><\/span><\/h3>\n

      \u0645\u0634\u0631\u0648\u0639 FNR<\/span><\/p>\n

      \u0627\u0644\u0645\u0634\u0631\u0648\u0639 \u0627\u0644\u0623\u0648\u0644: \u0645\u0646\u0635\u0629 IPs VLSI \u0627\u0644\u0645\u062e\u0635\u0635\u0629 \u0644\u0644\u062c\u0627\u0645\u0639\u0627\u062a \u0627\u0644\u062c\u0632\u0627\u0626\u0631\u064a\u0629<\/span><\/p>\n

      \u0627\u0644\u0623\u0639\u0636\u0627\u0621: \u0639. \u0643. \u0623\u0648\u062c\u064a\u062f\u0647\u060c \u0623. \u0644\u064a\u0639\u0627\u0634\u0629\u060c \u0645. \u0628\u0643\u064a\u0631\u064a\u060c \u0641. \u0644\u0648\u064a\u0632\u060c \u0631. \u0646. \u0628\u0644\u0627\u0644<\/span><\/p>\n

      \u0642\u0627\u0626\u0645\u0629 \u0627\u0644\u0623\u0639\u0636\u0627\u0621<\/strong><\/span><\/h3>\n
        \n
      • \u0627\u0648\u062c\u064a\u062f\u0629 \u0639\u0628\u062f \u0627\u0644\u0643\u0631\u064a\u0645 \u0643\u0645\u0627\u0644 \u060c a_oudjida@cdta.dz \u060c \u0628\u0627\u062d\u062b \u0631\u0626\u064a\u0633\u064a<\/span><\/li>\n
      • \u0644\u064a\u0639\u0627\u0634\u0629 \u0623\u062d\u0645\u062f\u00a0 \u060c liacha@cdta.dz\u060c \u0628\u0627\u062d\u062b \u0631\u0626\u064a\u0633\u064a \u0628<\/span><\/li>\n
      • \u0628\u0643\u064a\u0631\u064a \u0645\u062d\u0645\u062f \u060c mbakiri@cdta.dz \u060c \u0628\u0627\u062d\u062b \u0631\u0626\u064a\u0633\u064a \u0628<\/span><\/li>\n
      • \u0644\u0648\u064a\u0632 \u0641\u062a\u064a\u062d\u0629\u00a0 \u060c flouiz@cdta.dz \u060c \u0645\u0633\u062a\u0634\u0627\u0631 \u0645\u0647\u0646\u062f\u0633 \u0623\u0628\u062d\u0627\u062b<\/span><\/li>\n
      • \u0628\u0644\u0627\u0644 \u0631\u064a\u0645\u0627 \u0646\u0627\u0631\u0645\u064a\u0646\u00a0 \u060c rbellal@cdta.dz \u060c \u0645\u0647\u0646\u062f\u0633 \u062f\u0639\u0645<\/span><\/li>\n<\/ul>\n

        \u0627\u0644\u0627\u062c\u0647\u0632\u0629 \/\u0627\u0644\u0628\u0631\u0645\u062c\u064a\u0627\u062a<\/strong><\/span><\/h3>\n
          \n
        • \u0644\u0648\u062d\u0627\u062a \u062a\u0642\u064a\u064a\u0645 FPGA<\/span><\/li>\n
        • \u0645\u0646\u0635\u0629 \u0627\u0644\u0625\u064a\u0642\u0627\u0639<\/span><\/li>\n
        • \u0645\u062d\u0644\u0644 \u0627\u0644\u0645\u0646\u0637\u0642 TLA714<\/span><\/li>\n
        • FT-G100 Microgrippers<\/span><\/li>\n
        • \u0646\u0638\u0627\u0645 \u0627\u0642\u062a\u0646\u0627\u0621 \u0627\u0644\u0643\u0645\u0628\u064a\u0648\u062a\u0631 \u0627\u0644\u0634\u062e\u0635\u064a \u0648\u0627\u0644\u062a\u062d\u0643\u0645 \u0641\u064a\u0647 (FT-SDA01 \u0648 FT-C01) \u0644\u062c\u0647\u0627\u0632 Microgripper FT-G100<\/span><\/li>\n
        • \u0627\u0644\u0625\u0632\u0627\u062d\u0629 \u0645\u062a\u0631 \u0627\u0644\u0644\u064a\u0632\u0631<\/span><\/li>\n<\/ul>\n

          \u0627\u0644\u062a\u0639\u0627\u0648\u0646<\/strong><\/span><\/h3>\n
            \n
          • \u0641\u0631\u064a\u0642 ALGOS \u060c \u0645\u0639\u0647\u062f INESC-ID \u060c \u0644\u0634\u0628\u0648\u0646\u0629 \u060c \u0627\u0644\u0628\u0631\u062a\u063a\u0627\u0644<\/span><\/li>\n
          • \u0641\u0631\u064a\u0642 DN \u060c \u062c\u0627\u0645\u0639\u0629 \u0643\u0627\u0633\u0644 \u060c \u0623\u0644\u0645\u0627\u0646\u064a\u0627<\/span><\/li>\n
          • \u0641\u0631\u064a\u0642 DISC \u060c \u0645\u0639\u0647\u062f FEMTO-ST \u060c \u0628\u064a\u0633\u0627\u0646\u0633\u0648\u0646 \u060c \u0641\u0631\u0646\u0633\u0627<\/span><\/li>\n
          • \u0641\u0631\u064a\u0642 AS2M \u060c \u0645\u0639\u0647\u062f FEMTO-ST \u060c \u0628\u064a\u0633\u0627\u0646\u0633\u0648\u0646 \u060c \u0641\u0631\u0646\u0633\u0627<\/span><\/li>\n
          • \u0641\u0631\u064a\u0642 PEQUAN \u060c LIP6\u060c \u062c\u0627\u0645\u0639\u0629 Jussieux University \u060c \u0628\u0627\u0631\u064a\u0633 \u060c \u0641\u0631\u0646\u0633\u0627<\/span><\/li>\n
          • \u0625\u064a\u0642\u0627\u0639 \u0627\u0644\u062a\u0623\u0633\u064a\u0633 \u060c \u0641\u0631\u064a\u0642 \u0627\u0644\u0628\u062d\u062b \u0648\u0627\u0644\u062a\u0637\u0648\u064a\u0631 \u0641\u064a \u062a\u0648\u0644\u064a\u0641 RTL \u060c \u0644\u0648\u0633 \u0623\u0646\u062c\u0644\u0648\u0633 \u060c \u0627\u0644\u0648\u0644\u0627\u064a\u0627\u062a \u0627\u0644\u0645\u062a\u062d\u062f\u0629 \u0627\u0644\u0623\u0645\u0631\u064a\u0643\u064a\u0629<\/span><\/li>\n<\/ul>\n

            [\/vc_column_text][\/vc_column][\/vc_row]<\/p>\n","protected":false},"excerpt":{"rendered":"

            [vc_row][vc_column][vc_column_text] \u0641\u0631\u064a\u0642: \u0627\u0644\u062d\u0633\u0627\u0628 \u0627\u0644\u062b\u0646\u0627\u0626\u064a \u0644\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a \u0627\u0644\u0631\u0642\u0645\u064a\u0629 \u0642\u0627\u0626\u062f \u0627\u0644\u0641\u0631\u064a\u0642: \u0623\u0648\u062c\u064a\u062f\u0629 \u0639\u0628\u062f \u0627\u0644\u0643\u0631\u064a\u0645 \u0643\u0645\u0627\u0644 \u0639\u0631\u0636 \u0627\u0644\u0641\u0631\u064a\u0642 \u0641\u0631\u064a\u0642 BANA \u0646\u0634\u0637 \u0641\u064a \u0645\u062c\u0627\u0644 \u062a\u0637\u0648\u064a\u0631 IP-VLSI \u0627\u0644\u0645\u064f\u062d\u0633\u0651\u0646 \u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a \u0645\u0639\u0627\u0644\u062c\u0629 \u0627\u0644\u0625\u0634\u0627\u0631\u0627\u062a \/ \u0627\u0644\u0635\u0648\u0631 \u0648\u0623\u0646\u0638\u0645\u0629 \u0627\u0644\u062a\u062d\u0643\u0645 \u0648\u0623\u0646\u0638\u0645\u0629 \u0627\u0644\u062a\u0634\u0641\u064a\u0631 \u0648\u0645\u0627 \u0625\u0644\u0649 \u0630\u0644\u0643. \u0645\u0648\u0636\u0648\u0639 \u0627\u0644\u0628\u062d\u062b \u062a\u0637\u0648\u064a\u0631 \u062e\u0648\u0627\u0631\u0632\u0645\u064a\u0627\u062a \u0648\u0625\u0639\u0627\u062f\u0629 \u062a\u0631\u0645\u064a\u0632 \u062c\u062f\u064a\u062f\u0629 \u062a\u0633\u062a\u0646\u062f \u0625\u0644\u0649 \u062d\u0633\u0627\u0628 \u062f\u0642\u064a\u0642 \u0648\u063a\u064a\u0631 \u062f\u0642\u064a\u0642 \u0644\u062a\u062d\u0633\u064a\u0646 VLSI \u0644\u0644\u0623\u0646\u0638\u0645\u0629 \u0627\u0644\u062e\u0637\u064a\u0629 \u0627\u0644\u062a\u064a \u062a\u062e\u062a\u0644\u0641 \u0648\u062a\u062a\u063a\u064a\u0631 \u0628\u0645\u0631\u0648\u0631 […]<\/p>\n","protected":false},"author":46,"featured_media":2447,"parent":7304,"menu_order":5,"comment_status":"closed","ping_status":"closed","template":"division-page.php","meta":{"footnotes":""},"class_list":["post-8280","page","type-page","status-publish","has-post-thumbnail","hentry"],"_links":{"self":[{"href":"https:\/\/www.cdta.dz\/ar\/wp-json\/wp\/v2\/pages\/8280\/"}],"collection":[{"href":"https:\/\/www.cdta.dz\/ar\/wp-json\/wp\/v2\/pages\/"}],"about":[{"href":"https:\/\/www.cdta.dz\/ar\/wp-json\/wp\/v2\/types\/page\/"}],"author":[{"embeddable":true,"href":"https:\/\/www.cdta.dz\/ar\/wp-json\/wp\/v2\/users\/46\/"}],"replies":[{"embeddable":true,"href":"https:\/\/www.cdta.dz\/ar\/wp-json\/wp\/v2\/comments\/?post=8280"}],"version-history":[{"count":1,"href":"https:\/\/www.cdta.dz\/ar\/wp-json\/wp\/v2\/pages\/8280\/revisions\/"}],"predecessor-version":[{"id":13702,"href":"https:\/\/www.cdta.dz\/ar\/wp-json\/wp\/v2\/pages\/8280\/revisions\/13702\/"}],"up":[{"embeddable":true,"href":"https:\/\/www.cdta.dz\/ar\/wp-json\/wp\/v2\/pages\/7304\/"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.cdta.dz\/ar\/wp-json\/wp\/v2\/media\/2447\/"}],"wp:attachment":[{"href":"https:\/\/www.cdta.dz\/ar\/wp-json\/wp\/v2\/media\/?parent=8280"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}