Abstract; In this paper, we model the geometric component in a charge pumping (CP) technique of polycrystalline silicon thin-film transistors (poly-Si TFTs). This model is based on both remaining carrier types when the device transits from accumulation to inversion and vice versa. Therefore, it depends on gate length (L) and width (W) as well as […]
October 16, 2019 Rachid SIKADOUR 2015, Microelectronic & Nanotechnologie Division, Reliability of Semiconductor Components Team Logic gates, MOSFET, Thin film transistors
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Abstract; In this paper, we model the geometric component of a charge-pumping (CP) technique. Base on this proposed model, we have established an analytic equation for charge-pumping current. This equation seems to be a universal one since it is in agreement with CP experimental data of different technologies devices. Instead of the classical considerations regarding […]
October 16, 2019 Rachid SIKADOUR 2015, Microelectronic & Nanotechnologie Division, Reliability of Semiconductor Components Team Logic gates, Mathematical model, MOSFET
Abstract; The electromechanical response of a chemical gas sensor based on a TFBAR (Thin Film Bulk Acoustic Resonator) structure coated with a sensitive polymer layer was simulated with a FEM (Finite Elements Method) software (COMSOL Multiphysics®). The principle of sensing is based on the change of the mechanical properties of the polymer due to the […]
October 16, 2019 Rachid SIKADOUR 2015, Micro-Electro-Mechanical Systems and Sensors Team, Microelectronic & Nanotechnologie Division Gas Sensor, TFBAR, ZnO
Abstract; SIC (Application Specific Integrated Circuit) design verification takes as long as the designers take to describe, synthesis and implement the design. The hybrid approach, where the design is first prototyped on an FPGA (Field-Programmable Gate Array) platform for functional validation and then implemented as an ASIC allows earlier defect detection in the design process […]
October 16, 2019 Rachid SIKADOUR 2016, Microelectronic & Nanotechnologie Division, Tools, Digital Circuits and Systems Design Team ASIC, FPGA, Opencores
Abstract; In this letter, a new compact microstrip ultra‐wideband (UWB) bandpass filter (BPF) is proposed. Using a new electrical model leading to a simple structure based on radial stub resonator (RSR), its originality resides in its noteworthy simple design approach where the filter response can be accurately adjusted by tuning three parameters only. The fabricated […]
October 16, 2019 Rachid SIKADOUR 2016, Analog / Radio Frequency Integrated Circuits Team, Microelectronic & Nanotechnologie Division bandpass filter, compact, microstrip
Abstract; In this work, a new ultra‐wideband (UWB) bandpass filter (BPF) with notch band (NB) at 5–6 GHz is presented. The design is performed using the impedance matching method based on optimization of objective function defined in the frequency range 3.1–10.6 GHz. The filter structure is composed of uniform transmission line loaded, at its center, […]
October 16, 2019 Rachid SIKADOUR 2016, Analog / Radio Frequency Integrated Circuits Team, Microelectronic & Nanotechnologie Division bandpass filter, compact, ultra‐wideband
Abstract; We have experimentally analyzed negative bias temperature instability (NBTI) stress/recovery cycle on n-channel metal oxide semiconductor field effect transistors (n-MOSFET’s). Data obtained by current–voltage (I–V) and charge pumping (CP) techniques have revealed a turn-around phenomenon in both threshold voltage shift (ΔVth) and maximum CP current shift (ΔICP-Max). This allows us to separate the evolution of interface […]
October 16, 2019 Rachid SIKADOUR 2016, Microelectronic & Nanotechnologie Division, Reliability of Semiconductor Components Team charge pumping, NBTI n-MOSFETs, Turn-around phenomenon
Abstract; In this paper, an experimental analysis of the impact of dynamic negative bias temperature instability (NBTI) stress on the CMOS inverter dc response and temporal performance is presented. We analyzed the circuit behavior subjected to ac NBTI in the prospect to correlate the induced degradation with that seen at PMOS device level. The results […]
October 16, 2019 Rachid SIKADOUR 2016, Microelectronic & Nanotechnologie Division, Reliability of Semiconductor Components Team CMOS integrated circuits, Inverters, Stress
Abstract; This paper presents a preliminary comparative study for two different guard rings structures in the purpose of evaluating their electrical performances. The two structures are based on the n-in-p technology with different implant type of guard rings. I–V characteristics have been simulated using Silvaco/ATLAS software for both structures and compared for various parameters of […]
October 16, 2019 Rachid SIKADOUR 2016, Micro-Electro-Mechanical Systems and Sensors Team, Microelectronic & Nanotechnologie Division Breakdown voltage, silicon detector, TCAD simulation
Abstract; Network on Chip (NoC) is a new communication medium used for systems-on-chip (SoCs). In an SoC, the placement of the communicating elements across the network has an impact on system performance. Such a placing is called the MAPPING phase in networks on chip design process. Many approaches dealing with the mapping phase have been […]
October 15, 2019 Rachid SIKADOUR 2017, Microelectronic & Nanotechnologie Division, Tools, Digital Circuits and Systems Design Team Network on chip, placing, topology