Abstract; The aim of this paper is to present a newdesignreuse approachforautomatic generation ofVoice overInternet protocol (VOIP)hardware description andimplementation intoFPSOCs and ASICs.Ourmotivation behind this work is justified by the following arguments:first,VOIP based System on chip(SOC) implementation is an emergingresearch and development area, whereinnovativeapplications canbe implemented. Second,these systems are very complex and due to time to […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Tools, Digital Circuits and Systems Design Team FPGA, Systems on Chip, Voice over IP
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Abstract; The aim of this paper is to propose a new classification approach of artificial neural networks hardware. Our motivation behind this work is justified by the following two arguments: first, during the last two decades a lot of approaches have been proposed for classification of neural networks hardware. However, at present there is not […]
October 16, 2019 Rachid SIKADOUR 2014, Microelectronic & Nanotechnologie Division, Tools, Digital Circuits and Systems Design Team ANN hardware Classification Neurocomputers VLSI ASICs FPGA Embedded systems on chip
Abstract; The IP reuse approach and FPGA-platform-based SoC (System on Chip) with an embedded soft processor is an alternative to design SoCs that allows fast creation and verification. In this paper we address a comparison study between two SoCs architectures based OpenRISC (OpenCores) and MicroBlaze (proprietary) soft processors. The comparison is done for two applications, […]
October 16, 2019 Rachid SIKADOUR 2014, Microelectronic & Nanotechnologie Division, Tools, Digital Circuits and Systems Design Team AC97 controller, Audio, FPGA
Abstract; SIC (Application Specific Integrated Circuit) design verification takes as long as the designers take to describe, synthesis and implement the design. The hybrid approach, where the design is first prototyped on an FPGA (Field-Programmable Gate Array) platform for functional validation and then implemented as an ASIC allows earlier defect detection in the design process […]
October 16, 2019 Rachid SIKADOUR 2016, Microelectronic & Nanotechnologie Division, Tools, Digital Circuits and Systems Design Team ASIC, FPGA, Opencores
Abstract; Network on Chip (NoC) is a new communication medium used for systems-on-chip (SoCs). In an SoC, the placement of the communicating elements across the network has an impact on system performance. Such a placing is called the MAPPING phase in networks on chip design process. Many approaches dealing with the mapping phase have been […]
October 15, 2019 Rachid SIKADOUR 2017, Microelectronic & Nanotechnologie Division, Tools, Digital Circuits and Systems Design Team Network on chip, placing, topology
Abstract; The Maximum Power Point Tracking controller (MPPT) is a key element in Photovoltaic systems (PV). It is used to maintain the PV operating point at its maximum under different temperatures and sunlight irradiations. The goal of a MPPT controller is to satisfy the following performances criteria: accuracy, precision, speed, robustness and handling the partial […]
October 15, 2019 Rachid SIKADOUR 2017, Microelectronic & Nanotechnologie Division, Tools, Digital Circuits and Systems Design Team Bio Inspired Optimization, Maximum Power Point Tracking (MPPT), Photovoltaic systems
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