Abstract; The present work analyses the non-ideal effects of pipelined analog-to-digital converters (ADCs), also sometimes referred to as pipeline ADCs, including the non-ideal effects in operational amplifiers (op-amps or OAs), switches and sampling circuits. We study these nonlinear effects in pipelined ADCs built using CMOS technology and switched-capacitor (SC) techniques. The proposed improved model of […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Team CDS Pipeline ADCA/D converter modelingbehavioral modelingADC non-idealities
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Abstract; The increasing architecture complexity of data converters makes it necessary to use behavioral models to simulate their electrical performance and to determine their relevant data features. For this purpose, a specific data converter simulation environment has been developed which allows designers to perform time-domain behavioral simulations of pipelined analog to digital converters (ADCs). All […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Team CDS analog to digital converters (ADCs), Behavioral modeling, pipelined ADC
Abstract; In this paper, a design for testability of 10 bits continuous time sigma delta ADC is presented. This new full test technique provides: simple way, 2 external lines and high testability for the circuit’s performances. This test is used for different sub-circuits evaluation and characterization to determine the contribution of each part in the […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Team CDS Design for testability (DfT)Continuous time sigma delta ADCDesign of CMOS integrated circuit
Abstract; Combining simultaneously on the fly interface-trap (OTFIT) and the reverse voltage variation of source and drain (S/D) during measurement phase of measure/stress/measure (MSM) sequences, we have been able to scan the negative bias temperature instability (NBTI) across the channel length of PMOS transistors. In addition, we have analyzed the generation and evolution of interface-trap […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Team CDS Charge-pumpingInterface-trap, Lateral distribution, NBTI stress
Abstract; An experimental method is proposed to determine and remove the geometric component in charge pumping (CP) measurements. This method uses CP-current data of different gate length transistors (LG) with fixed gate width (WG) to obtain an empirical model for the remaining carriers in MOSFET channel after the switch off. This allows to investigate the […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Team CDS CP-current, geometric component, NBTI