Analog Design for Testability Technique for First Order Sigma Delta ADC

Abstract; In this paper, a design for testability of 10 bits continuous time sigma delta ADC is presented. This new full test technique provides: simple way, 2 external lines and high testability for the circuit’s performances. This test is used for different sub-circuits evaluation and characterization to determine the contribution of each part in the […]

October 16, 2019 Rachid SIKADOUR , ,