On the Correlation between Circuit-level & Device-level Degradations due to AC NBTI Stress

Abstract; In this paper, an experimental analysis of the impact of dynamic negative bias temperature instability (NBTI) stress on the CMOS inverter dc response and temporal performance is presented. We analyzed the circuit behavior subjected to ac NBTI in the prospect to correlate the induced degradation with that seen at PMOS device level. The results […]

October 16, 2019 Rachid SIKADOUR , , , ,