On the Correlation between Circuit-level & Device-level Degradations due to AC NBTI Stress

Abstract; In this paper, an experimental analysis of the impact of dynamic negative bias temperature instability (NBTI) stress on the CMOS inverter dc response and temporal performance is presented. We analyzed the circuit behavior subjected to ac NBTI in the prospect to correlate the induced degradation with that seen at PMOS device level. The results […]

October 16, 2019 Rachid SIKADOUR , , , ,

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Experimental Investigation of NBTI Degradation in Power VDMOS Transistors Under Low Magnetic Field

Abstract; In this paper, we report an experimental evidence of the impact of applied a low magnetic field (B <; 10 mT) during negative bias temperature instability (NBTI) stress and recovery, on commercial power double diffused MOS transistor. We show that both interface (ANit) and oxide trap (ANot) induced by NBTI stress are reduced by […]

October 15, 2019 Rachid SIKADOUR , , , ,

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