A New Design Reuse Approach For Voip Implementation Into FPSoCs And ASICs,


The aim of this paper is to present a newdesignreuse approachforautomatic generation ofVoice overInternet protocol (VOIP)hardware description andimplementation intoFPSOCs and ASICs.Ourmotivation behind this work is justified by the following arguments:first,VOIP based System on chip(SOC) implementation is an emergingresearch and development area, whereinnovativeapplications canbe implemented. Second,these systems are very complex and due to time to market pressure, there is a needto built platforms that help the designer to explore with different architectural possibilities and choose thecircuit that best correspond to the specifications. Third,we aim to develop in hardware,design,methodsand tools that are used in softwarelike the MATLAB tool for VOIP implementation.To achieve our goal,the proposed design approach is basedon a modular design of the VOIP architecture. The originality ofour approach is the application of the design for reuse (DFR) and the design with reuse (DWR) concepts.To validate the approach, a case study of a SOC based on the OR1K processor is studied.Wedemonstratethat theproposedSoCarchitecture isreconfigurable, scalable and the final RTL code can be reused forany FPSOCor ASIC technology.As an example,Performances measures, in the VIRTEX-5 FPGA devicefamily,and ASIC 65nm technology are shown through this paper.