Abstract; The aim of this paper is to present a newdesignreuse approachforautomatic generation ofVoice overInternet protocol (VOIP)hardware description andimplementation intoFPSOCs and ASICs.Ourmotivation behind this work is justified by the following arguments:first,VOIP based System on chip(SOC) implementation is an emergingresearch and development area, whereinnovativeapplications canbe implemented. Second,these systems are very complex and due to time to […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Tools, Digital Circuits and Systems Design Team FPGA, Systems on Chip, Voice over IP
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Abstract; In this paper, we prove theoretically and experimentally the existence of complete ultrasonic band gap in phononic crystal beam. The phononic beam structure studied is composed of a linear lattice array of square pillars on a beam, made with aluminum-fortal easily machinable at centimetric scale. Ultrasonic characterization of phononic beam guides shows the existence […]
October 16, 2019 Rachid SIKADOUR 2013, Micro-Electro-Mechanical Systems and Sensors Team, Microelectronic & Nanotechnologie Division Aluminum, Columns (Structural), Energy gap
Abstract; The present work analyses the non-ideal effects of pipelined analog-to-digital converters (ADCs), also sometimes referred to as pipeline ADCs, including the non-ideal effects in operational amplifiers (op-amps or OAs), switches and sampling circuits. We study these nonlinear effects in pipelined ADCs built using CMOS technology and switched-capacitor (SC) techniques. The proposed improved model of […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Team CDS Pipeline ADCA/D converter modelingbehavioral modelingADC non-idealities
Abstract; The increasing architecture complexity of data converters makes it necessary to use behavioral models to simulate their electrical performance and to determine their relevant data features. For this purpose, a specific data converter simulation environment has been developed which allows designers to perform time-domain behavioral simulations of pipelined analog to digital converters (ADCs). All […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Team CDS analog to digital converters (ADCs), Behavioral modeling, pipelined ADC
Abstract; In this paper, a design for testability of 10 bits continuous time sigma delta ADC is presented. This new full test technique provides: simple way, 2 external lines and high testability for the circuit’s performances. This test is used for different sub-circuits evaluation and characterization to determine the contribution of each part in the […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Team CDS Design for testability (DfT)Continuous time sigma delta ADCDesign of CMOS integrated circuit
Abstract; Combining simultaneously on the fly interface-trap (OTFIT) and the reverse voltage variation of source and drain (S/D) during measurement phase of measure/stress/measure (MSM) sequences, we have been able to scan the negative bias temperature instability (NBTI) across the channel length of PMOS transistors. In addition, we have analyzed the generation and evolution of interface-trap […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Team CDS Charge-pumpingInterface-trap, Lateral distribution, NBTI stress
Abstract; An experimental method is proposed to determine and remove the geometric component in charge pumping (CP) measurements. This method uses CP-current data of different gate length transistors (LG) with fixed gate width (WG) to obtain an empirical model for the remaining carriers in MOSFET channel after the switch off. This allows to investigate the […]
October 16, 2019 Rachid SIKADOUR 2013, Microelectronic & Nanotechnologie Division, Team CDS CP-current, geometric component, NBTI
Abstract; The aim of this paper is to propose a new classification approach of artificial neural networks hardware. Our motivation behind this work is justified by the following two arguments: first, during the last two decades a lot of approaches have been proposed for classification of neural networks hardware. However, at present there is not […]
October 16, 2019 Rachid SIKADOUR 2014, Microelectronic & Nanotechnologie Division, Tools, Digital Circuits and Systems Design Team ANN hardware Classification Neurocomputers VLSI ASICs FPGA Embedded systems on chip
Abstract; The IP reuse approach and FPGA-platform-based SoC (System on Chip) with an embedded soft processor is an alternative to design SoCs that allows fast creation and verification. In this paper we address a comparison study between two SoCs architectures based OpenRISC (OpenCores) and MicroBlaze (proprietary) soft processors. The comparison is done for two applications, […]
October 16, 2019 Rachid SIKADOUR 2014, Microelectronic & Nanotechnologie Division, Tools, Digital Circuits and Systems Design Team AC97 controller, Audio, FPGA
Abstract; A compact reconfigurable CMOS low-noise amplifier (LNA) is presented for applications in DCS1800, UMTS, WLAN-b/g and Bluetooth standards. The proposed LNA features first a current reuse shunt-feedback amplifier for wideband input matching, low-noise figure and small area. Secondly, a cascode amplifier with a tunable active LC resonator is added for high gain and continuous […]
October 16, 2019 Rachid SIKADOUR 2014, Analog / Radio Frequency Integrated Circuits Team, Microelectronic & Nanotechnologie Division Amplifiers, CMOS integrated circuits, Mobile radio systems
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